Showing posts with label
SPICE Modeling
.
Show all posts
Showing posts with label
SPICE Modeling
.
Show all posts
Jan 13, 2025
[paper] SPICE Compact FLASH Memory Model
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Jung Rae Cho 1, Donghyun Ryu 2,3, Donguk Kim1, Wonjung Kim1, Yeonwoo Kim 2,3, Changwook Kim 1, Yoon Kim 4, Myounggon Kang 5, Jiyong Woo 6, a...
Jul 11, 2023
[paper] Printed OTFTs
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Non-Quasi-Static modeling of printed OTFTs Antonio Valletta 1,2 , Matteo Rapisarda 1,2 , Mattia Scagliotti 1 , Guglielmo Fortunato 1 , Luigi...
Mar 2, 2022
[paper] SPICE Modeling and Circuit Demonstration of a SiC Power IC Technology
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Tianshi Liu 1 , Hua Zhang 1 , Sundar Babu Isukapati 2 , Emran Ashik 3 , Adam J. Morgan 2 , Bongmook Lee 3 , Woongje Sung 2 , Ayman Fayed 1 ,...
Aug 4, 2020
[paper] SiC MOSFET SPICE Model
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Lefdal Hove, Haavard, Ole Christian Spro, Giuseppe Guidi and Dimosthenis Peftitsis Improved SiC MOSFET SPICE Model to Avoid Convergence Erro...
Jul 14, 2020
[paper] Carbon Nanotube Detectors and Spectrometers for the Terahertz Range
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Junsung Park 1 , Xueqing Liu 1 , Trond Ytterdal 2 and Michael Shur 1,3 Carbon Nanotube Detectors and Spectrometers for the Terahertz ...
Jun 2, 2020
IEEE EDS Delhi Chapter DL: FOSS TCAD/EDA tools for Compact/SPICE Modeling
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The IEEE EDS Delhi Chapter, New Delhi, India is conducting a series of the IEEE EDS DL Talks with coming one on June 03, 2020 at 06:00 pm...
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