[paper] State Transitions in Autonomous Nonlinear Bistable Systems

Léopold Van Brandt and Jean-Charles Delvenne

Predicting State Transitions in Autonomous Nonlinear Bistable Systems

with Hidden Stochasticity

IEEE Control Systems Letters (L-CSS 2024)

* UCLouvain, Louvain-la-Neuve (B)

Abstract: Bistable autonomous systems can be found in many areas of science. When the intrinsic noise intensity is large, these systems exhibits stochastic transitions from one metastable steady state to another. In electronic bistable memories, these transitions are failures, usually simulated in a Monte-Carlo fashion at a high CPU-time price. Existing closed form formulas, relying on near-stable-steady-state approximations of the nonlinear system dynamics to estimate the mean transition time, have turned out inaccurate. Our contribution is twofold. From a unidimensional stochastic model of overdamped autonomous systems, we propose an extended Eyring-Kramers analytical formula accounting for both nonlinear drift and state-dependent white noise variance, rigorously derived from Itô stochastic calculus. We also adapt it to practical system engineering situations where the intrinsic noise sources are hidden and can only be inferred from the fluctuations of observables measured in steady states. First numerical trials on an industrial electronic case study suggest that our approximate prediction formula achieve remarkable accuracy, outperforming previous non-Monte-Carlo approaches.

Fig: (a) SRAM bitcell retaining a logical 0 or 1 encoded on two complementary node voltages (v2 and v1) as low and high levels VL and VH. The retained state is stabilised by a feedback loop implemented by two cross-coupled inverters. An inverter is a nonlinear time-invariant system producing a high VH (resp. low VL) output when its input is maintained at constant low VL (resp. high VH), yet with internal dynamics and intrinsic noise.

(b) Transient noise simulation at supply voltage VDD = 70 mV (adapted from [1]). Intrinsic noise-induced stochastic state transitions (bit flips VL ↔ VH) are observed. VM denotes the threshold voltage corresponding to the unstable state. For the illustrated case, the bistable system is symmetrical in the sense that two inverters are identical, making the two steady states equiprobable and the transitions VL ↔ VH rates equal.

Acknowledgements: The work has been partially supported by the Research Project "Thermodynamics of Circuits for Computation" of the National Fund for Scientific

Research (FNRS) of Belgium.