[IC Design] Single Photon Counting ASIC for Synchrotron Applications

Ultra-Fast Single Photon Counting ASIC for Fast Synchrotron Applications

Dr hab. inż Piotr Kmon

AGH University, Cracow, Poland

European Synchrotron Radiation Facility (ESRF), Grenoble, France

Abstract: The SPHIRD (Small Pixel High Rate photon counting Detector) project is an R&D study to investigate how far the photon counting X-ray hybrid pixel detector technology can go, regarding photon rate and spatial resolution. A goal was to boost by 30 times the count-rate capabilities of existing detectors of similar pixel size. SPHIRD targets that figure by designing fast front end electronics, by including pile-up compensation techniques in the pixel logic, and by implementing smaller pixels. Each pixel contains fast front-end analog electronics (pulse width is only 18ns) with base-line holder (BLH), a set of discriminators (with offset trimming blocks), ripple counters, and digital blocks. The pixel architecture allows also for operation in conventional mode (STDC) and with different pulse pile-up compensation methods (these are voltage and time based methods named VDIS, TDIS, and FPHC respectively).

Fig: Schematic idea of the recording channel and the chip photo with mounted detector

Technology: TSMC 40nm GP; Die Size: 3.2mm x 3.5mm

Acknowledgements: The chip design was realized by P. Grybos, R. Kleczek, P. Otfinowski, and P. Kmon (AGH) while synchrotron experiments were conducted by P. Fajarado, D. Magalhaes and M. Raut.

References
[1] P. Grybos,et.al., “SPHIRD–Single Photon Counting Pixel Readout ASIC With Pulse Pile-Up Compensation Methods”, IEEE IEEE Transactions on Circuits and Systems--II: Express Briefs, vol. 70, no. 9, 2023, p. 3248-3252.
[2] D. Magalhaes et al., Very High Rate X-ray Photon Counting 2D Detectors with Small Pixels: the SPHIRD Project. 2022 IEEE NSS-MIC-RTSD Conference Proceedings.