[paper] 3nm Nano-Sheet FETs

Etienne SICARD* and Lionel TROJMAN**

Introducing 3-nm Nano-Sheet FET technology in Microwind

hal-03377556: Submitted on 14 Oct 2021

  

*INSA-Dgei, Toulouse (F)
**ISEP, Issy les Moulineaux (F)

Abstract: This paper describes the implementation of the novel Nano-sheet FET (NS-FET) for the 3-nm CMOS technology node in Microwind. After a general presentation of the electronic market and the roadmap to the atomic scale, design rules and basic metrics for the 3-nm node are presented. Concepts related to the design of NS-FET and design for manufacturing are also described. The performances of a ring oscillator, basic cells, sequential cells and a 6-transistor RAM memory are also analyzed.

Fig: A simple 3-stage ring oscillator based on compiled inverters “Fast” mode.

[ref] MICROWIND software allows the designer to simulate and design an integrated circuit at physical description level. Born in Toulouse (France), Microwind is an innovative CMOS design tool for educational market.