[review] CNTFET Technology for RF Applications

CNTFET Technology for RF Applications: Review and Future Perspective 

Martin Hartmann^1,2, Sascha Hermann^1,2,3, Phil F. Marsh⁴, Christopher Rutherglen⁴, 

Dawei Wang⁵, Li Ding⁶, Lian-Mao Peng⁶, Martin Claus⁷ 

and Michael Schröter⁷ (Senior Member, IEEE)

(Invited Paper)

in IEEE Journal of Microwaves, vol. 1, no. 1, pp. 275-287, winter 2021, 

DOI: 10.1109/JMW.2020.3033781

1Center for Microtechnology, Chemnitz University of Technology, 09111 Chemnitz, Germany
2Center for Advancing Electronics Dresden, 09111 Chemnitz, Chemnitz
3Fraunhofer Institute for Electronic Nanosystems, 09126 Chemnitz, Germany
4Carbonics Inc., Culver City, CA 90230 USA
5Carbon Technology Inc., Irvine, CA 92619 USA
6Key Laboratory for the Physics and Chemistry of Nanodevices and Center for Carbon-based Electronics, Department of Electronics, Peking University, Beijing 100871, China
7Chair for Electron Devices and Integrated Circuits, Technical University Dresden, 01069 Dresden, Germany

Abstract: RF CNTFETs are one of the most promising devices for surpassing incumbent RF-CMOS technology in the near future. Experimental proof of concept that outperformed Si CMOS at the 130 nm technology has already been achieved with a vast potential for improvements. This review compiles and compares the different CNT integration technologies, the achieved RF results as well as demonstrated RF circuits. Moreover, it suggests approaches to enhance the RF performance of CNTFETs further to allow more profound CNTFET based systems e.g., on flexible substrates, highly dense 3D stacks, heterogeneously combined with incumbent technologies or an all-CNT system on a chip.

Fig: (a) sketch of a T-shape top gate on 4′′ wafer and (b) corresponding SEM image, (c) SEM image [I] in false colors depicting a multifinger buried gate CNTFET on an 8" wafer [II].

Acknowledgement: This work was supported in part by the German Research Foundation (DFG) through the Cluster of Excellence “Center for Advancing Electronics Dresden” (EXC1056/1); in part by the Federal Ministry of Education and Research under the project reference numbers 16FMD01K, 16FMD02 and 16FMD03, under the individual DFG Grant SCR695/6%25; in part by the National Key Research & Development Program under Grant 2016YFA0201901; in part by the National Science Foundation of China under Grants 61888102 and 61671020; in part by the Beijing Municipal Science and Technology Commission under Grant Z181100004418011; in part by the King Abdulaziz City for Science and Technology (KACST); in part by The Saudi Technology Development and Investment Company (TAQNIA); in part by the U.S. Army STTR Contract W911NF19P002; and in part by the SBIR programs from the U.S. National Science Foundation and the U.S. Air Force Research Laboratory.

REF:

[I] C. Rutherglen et al., "Wafer-scalable aligned carbon nanotube transistors operating at frequencies of over 100 GHz", Nature Electron., vol. 2, no. 11, pp. 530-539, 2019.

[II] M. Hartmann et al., "Gate spacer investigation for improving the speed of high-frequency carbon nanotube-based field-effect transistors", ACS Appl. Mater. Interfaces, vol. 12, no. 24, pp. 27461-27466, 2020.