#paper F. Ávila Herrera, et al., "Leading-Edge Thin-Layer MOSFET Potential Modeling Toward Short-Channel Effect Suppression and Device Optimization," in IEEE JEDS doi: 10.1109/JEDS.2019.2948648 doi: 10.1109/EDTM.2019.8731246 https://t.co/7E9755kTOW https://t.co/vh1Zy9BifJ

#paper F. Ávila Herrera, et al., "Leading-Edge Thin-Layer MOSFET Potential Modeling Toward Short-Channel Effect Suppression and Device Optimization," in IEEE JEDS
doi: 10.1109/JEDS.2019.2948648
doi: 10.1109/EDTM.2019.8731246https://t.co/7E9755kTOW pic.twitter.com/vh1Zy9BifJ

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