Aug 30, 2016

Implementation of TFET SPICE Model for Ultra-Low Power Circuit Analysis https://t.co/z6YQhzAkIv #papers #feedly


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August 30, 2016 at 11:06PM
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Aug 26, 2016

Modeling Early Breakdown Failures of Gate Oxide in SiC Power MOSFETs https://t.co/gwB6cmDMPB #papers #feedly


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August 26, 2016 at 12:39PM
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Aug 25, 2016

#Write beautiful #LaTeX #papers in an easy way. https://t.co/7HkkbDED7f


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August 25, 2016 at 10:56AM
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Aug 24, 2016

#Analog #DNA #circuit does math in a test tube https://t.co/iNOWaqkBMO #tech #feedly #papers


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August 24, 2016 at 08:46PM
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2-D Threshold Voltage Model for the Double-Gate p-n-p-n TFET With Localized Charges https://t.co/oyhQhOSEzQ #papers #feedly


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August 24, 2016 at 12:39PM
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Aug 19, 2016

Books You Should Read: Basic Electronics https://t.co/igihHzx3XQ #papers


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August 19, 2016 at 09:37PM
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Aug 18, 2016

ECSCRM 2016 Tutorial Day Announcement

ECSCRM 2016
Announcement of Tutorial Day
Sept.25, 2016, Halkidiki, GREECE

The 11th European Conference on Silicon Carbide and Related Materials (ECSCRM) will be held on Sept. 25-29 in Halkidiki, Greece

Early Registration: August 20, 2016
Late Abstract Submission: August 23, 2016
Please see the conference website, http://ecscrm2016.org/

We are very happy to announce that a SiC MOSFET Tutorial Day is planned for Sunday, Sept.25, as a satellite event of ECSCRM 2016:

Tutorial Day Title: Learn how to develop your SiC MOSFET
in one day!

The main objective of the Tutorial is to introduce the audience to what is arguably the hottest topic in SiC devices: the technology of SiC MOSFETs. The Tutorial is primarily intended for PhD students working on SiC and possessing a solid technical background in semiconductor devices, as well as for semiconductor technology professionals who want to better familiarize themselves in this subject. Its concept/setup is to deliver all key information that will allow the audience to understand most of the content of any paper dedicated to SiC MOSFETs. The topics to be presented and the corresponding speakers are:
  1. Material for SiC MOSFET fabrication (bulk/epitaxial growth, selection criteria, defects, screening methods)
    Prof. T. Kimoto (Kyoto University, Japan)
  2. Physics and technology of SiO2/SiC interface
    Dr. Kevin Matocha (Monolith, USA)
  3. Other MOSFET processing (ohmic contacts, implantation, passivation, specific issues related to device geometry,…)
    Dr. Victor Veliadis (PowerAmerica/NCSU, USA)
  4. SiC MOSFET device physics and design (operation principles, charge model, TCAD simulation)
    Prof. J. Cooper (Purdue University, USA)
  5. SiC MOSFET electrical static and dynamic characterization, electrical stresses, device reliability
    Prof. A. Castellazzi (Nottingham University, UK)
  6. SiC MOSFET as circuit components – targeted applications
    Dr. Ljubisa Stevanovic (GE, USA)
  7. Summarizing remarks (evolution of SiC MOSFETs – main open points)
    (under confirmation)
Please note there is separate registration to attend the tutorial. The registration fee is €60 for ECSCRM 2016 participants, and €200 for non-participants. The registration fee for students* is €60, regardless of ECSCRM 2016 registration. The fee covers lectures, tutorial materials, as well as lunch and coffee breaks on tutorial day.

The organizing committee of ECSCRM 2016 Tutorial Day
  • Matthias Bucher (Technical University of Crete, TUC, Greece)
  • Peter Friedrichs (Infineon, Germany)
  • Konstantin Vasilevskiy (Newcastle University, UK)
  • Konstantinos Zekentes (FORTH, Greece)
* Student status will be recognized only to PhD and Master students. Post-docs are kindly requested to register as regular participants. Students must provide evidence of their status by sending a student certificate or a copy of a valid student ID to the conference secretariat upon registration.

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Aug 15, 2016

History Of The Diode https://t.co/fHiuWidp8o #todo #feedly #papers


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August 15, 2016 at 11:56PM
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Effect of gate-length downscaling on the analog/RF and linearity performance of InAs NW TFET https://t.co/If4CzeK8uI #papers #feedly


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August 15, 2016 at 11:45AM
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Aug 14, 2016

[mos-ak] [final program] MOS-AK ESSDERC/ESSCIRC Workshop; Lausanne September 12, 2016

 MOS-AK ESSDERC/ESSCIRC Workshop  
   Lausanne September 12, 2016 
    Final Workshop Program

 Together with International MOS-AK Board of R&D Advisers: Larry Nagel, Omega Enterprises Consulting (USA), Andrei Vladimirescu, UCB (USA); ISEP (FR) and local workshop coordinator Jean-Michel Sallese, EPFL (CH) as well as all the Extended MOS-AK TPC Committee, we have pleasure to invite to the 14th consecutive MOS-AK ESSDERC/ESSCIRC Workshop which will be held at Swisstech Convention Centre in Lausanne on September 12, 2016. The MOS-AK workshop is organized with aim to strengthen a network and discussion forum among experts in the field, enhance open platform for information exchange related to compact/SPICE modeling and Verilog-A standardization, bring people in the compact modeling field together, as well as obtain feedback from technology developers, circuit designers, and CAD/EDA tool developers and vendors. 

Venue:
Swisstech Convention Centre EPFL                                        
Route Louis-Favre 2
CH-1024 Ecublens

Online Workshop Program 
http://www.mos-ak.org/lausanne_2016/

Online Workshop Registration:
http://esscirc-essderc2016.epfl.ch/registration
(any related inquiries can be sent to register@mos-ak.org)

Postworkshop Publications:
Selected best MOS-AK technical presentation will be recommended for further publication in a special issue of the International Journal of High Speed Electronics and Systems

Extended MOS-AK Committee

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Aug 3, 2016

Flashy Wearable Patch Sees Under Your Skin https://t.co/k4lQcw8gsd #tech #feedly #papers #openinnowation


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August 03, 2016 at 10:49PM
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Retrotechtacular: Old Transistors https://t.co/unvIp5rBPS #todo #feedly #papers


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August 03, 2016 at 09:17PM
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H2020 SPICE is not #SPICE- Spintronic-Photonic Integrated Circuit platform for novel Electronics https://t.co/P9hYGPxjsd #papers


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August 03, 2016 at 02:02PM
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Aug 1, 2016

In analog, we’re still pasting together #transistors and running #SPICE. What’s Holding Back #Analog? https://t.co/Um1VWwrKqP #papers


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August 01, 2016 at 09:28AM
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