An Update on the OpenPDK for IC Design (by Daniel Payne)

IC designers use EDA tools to implement their logical and physical design, and these tools require foundry-specific information for:

• Design Rule Checking (DRC)
• Layout Versus Schematic (LVS)
• Library Symbols
• Parasitic EXtraction (PEX)

This foundry information is called a Process Design Kit or PDK for short. Now put yourself in the place of the foundry or IDM, and you want to support EDA tools from multiple vendors like: Cadence Design Systems, Mentor Graphics, Synopsys, Silvaco and Tanner EDA. That adds up to a lot of QA and PDK development effort to support so many EDA vendors and tools. There has to be an easier way to create PDKs instead of one vendor at a time.




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