Alliance CAD System is a free set of EDA tools and portable cell libraries for VLSI design. It covers the design flow from VHDL up to layout. It includes VHDL simulator, RTL synthesis, place and route, netlist extractor, DRC, layout editor: http://alliancecad.sourceforge.net
This project may now be found at http://www-asim.lip6.fr/recherche/alliance/.
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