1st International MOS-AK Workshop on compact modeling, will be organized in San Francisco (co-located with the CMC Meeting and IEDM Conference) with aims to strengthen a network and discussion forum among experts in the field, create an open platform for information exchange related to compact/Spice modeling, bring people in the compact modeling field together, as well as obtain feedback from technology developers, circuit designers, and CAD tool vendors. The topics cover all important aspects of compact model development, implementation, deployment and standardization within the main theme - compact models for mainstream CMOS/SOI circuit simulation. The specific workshop goal will be to classify the most important directions for the future development of the compact models and to clearly identify areas that need further research. This workshop is designed for device process engineers (CMOS, SOI, BiCMOS, SiGe) who are interested in device modeling; ICs designers (RF/IF/Analog/Mixed-Signal/SoC) and those starting in that area as well as device characterization, modeling and parameter extraction engineers. The content will be beneficial for anyone who needs to learn what is really behind IC simulation in modern device models. The technical program of MOS-AK Workshop consists of one day of tutorials given by noted academic and industry experts, also a panel session is foreseen. The program will be availabe soon at: http://www.mos-ak.org/sanfrancisco/ | |
Speakers: | Tentative list of the speakers already includes following names (in alphabetic order):
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Dates: |
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Place: | The Westin St. Francis 335 Powell Street, San Francisco California 94102 |
Registration: | On-Line registration is available |
Committee: |
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