[mos-ak] [Final Program] 6th International MOS-AK/GSA Workshop Washington DC Dec.11, 2013

Final program of 6th International MOS-AK/GSA Workshop on Dec.11, 2013 in Washington DC is available online:

http://www.mos-ak.org/washington_dc_2013/

The program includes a freewheeling session organized to review modeling activities of the CMC, IEEE EDS CMTC, NEEDS NanoHub and MOS-AK Groups.

Event venue:

Embassy of Switzerland

2900 Cathedral Ave, NW,  

Washington, DC 20008 

USA 

Free On-line Workshop Registration is open, now.

Extended MOS-AK/GSA Committee:

• Wladek Grabinski, GMC Suisse; MOS-AK/GSA Group Manager
• Harrison Beasley, Technical WG Manager, GSA
  MOS-AK/GSA North America
• Chair: Pekka Ojala, Exar Corporation
• Co-Chair: Geoffrey Coram, Analog Devices
• Co-Chair: Prof. Jamal Deen, U.McMaster
• Co-Chair: Roberto Tinti, Agilent EEsof Division
  MOS-AK/GSA South America
• Chair: Prof. Gilson I Wirth; UFRGS; Brazil
• Co-Chair: Prof. Carlos Galup-Montor, UFSC; Brazil
• Co-Chair: Sergio Bampi, UFRGS, Brazil
• Co-Chair: Antonio Cerdeira Altuzarra, Cinvestav - IPN, Mexico
  MOS-AK/GSA Europe
• Chair: Ehrenfried Seebacher, AMS, Austria
  
• Co-Chair: Alexander Petr, XFab, Germany
  
• Co-Chair: Prof. Benjamin Iniguez, URV, Spain
  MOS-AK/GSA Asia/South Pacific
  
• Chair: Sadayuki Yoshitomi, Toshiba 
  
• Co-Chair: Xing Zhou, NTU Singapore    
  
• Co-Chair: A.B. Bhattacharyya, JIIT New Delhi

 

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2014 Workshop on Compact Modeling at techconnectworld.com

Abstracts due: December 13th, 2013

Synopsis: Compact Models (CMs) for circuit simulation have been at the heart of CAD tools for circuit design over the past decades, and are playing an ever increasingly important role in the nanometer system-on-chip (SOC) era. As the mainstream MOS technology is scaled into the nanometer regime, development of a truly physical and predictive compact model for circuit simulation that covers geometry, bias, temperature, DC, AC, RF, and noise characteristics becomes a major challenge.

Workshop on Compact Modeling (WCM) Is one of the first of its kind in bringing people in the CM field together. The objective of WCM is to create a truly open forum for discussion among experts in the field as well as feedback from technology developers, circuit designers, and CAD tool vendors. The topics cover all important aspects of compact model development and deployment, within the main theme - compact models for circuit simulation.

Symposium Chair: Professor Xing Zhou Nanyang Technological University, Singapore

[Call for Papers] IWCM 2014

Call for Papers IWCM 2014 

11th International Workshop on Compact Modeling 

January 23 (Thursday), 2014 

Suntec Singapore Convention and Exhibition Centre (Room 309)  

Scope: 
The workshop provides an opportunity for the discussion and the presentation of advances in modeling and simulation of integrated circuits.

Topics: 

• Compact modeling for all kinds of devices 
• Parameter extraction methodology and strategy 
• Circuit simulation techniques and platforms 

Abstract Submission:

Authors should submit a camera-ready abstract with 2 to 10 pages including figures for inclusion in the Workshop Proceedings, and send the electronic file in PDF or MS-Word format to mchan@ust.hk. Paper templates in Word format is downloadable from the ASP-DAC 2014 site. Deadline for the submission is December 15th, 2013. 

• Organization:
  Chair: Mansun Chan (Hong Kong University of Science and Technology, Hong Kong)
  Co-Chair: Hans Juergen Mattausch (Hiroshima University, Japan) 
• Committee members:
  T. Aikyou (STARC, Japan)
  Y. Cao (Arizona State University, USA)
  Jamel Deen (McMaster University, Canada)
  J. He (Peking University, China)
  Y. J. Park (Seoul National University, Korea)
  Zhiping Yu, (Tsinghua University, China)
  Xing Zhou (Nanyang Technology University, Singapore) 

Sponsor:
The University Grant Council of Hong Kong through the Area of Excellence Project (AOE/P-04/08)

Fee: Free admission

Contact: 
If you have any question, please contact  Mansun Chan

LETI Devices Workshop

The Churchill Hotel - 1914 Connecticut Ave. NW (across from the Hilton)

Washington D.C. 6-9 p.m on December 8, 2013

Inventing the future together: a stimulating discussion of our vision for silicon nanotechnologies in the next 10 years followed by a networking cocktail. Program is as follow:

• Introduction (10min)
  Jean-René Lequepeys; VP Silicon Components Division 
• Lithography cost-effective solutions for 1X nodes (15min)
  Serge Tedesco; Lithography Program Manager 
• 3D: Dream and reality (15 min)
  Mark Scannell; Senior Business Development Manager 
• High-performance and reliable resistive memories embedded in advanced logic CMOS technologies (15min)
  Barbara de Salvo; Advanced Memories Fellow
• M&NEMS platforms: an enabler for the next generation of sensors in consumer electronics (15min)
  Hugues Metras; VP Strategic Partnerships, North America
• CMOS technologies: our most power efficient solution today and our vision toward 10nm node and beyond (15 min)
  Maud Vinet; Advanced CMOS Manager

[read more...]