10th International MOS-AK Workshop
(co-located with the CMC Meeting and IEDM Conference)
http://www.mos-ak.org/silicon_valley_2017/
Silicon Valley, December 6, 2017
2nd Announcement and Call for Papers
Together with local organization teams Cadence Design Systems and Keysight Technologies as well as International MOS-AK Board of R&D Advisers: Larry Nagel, Omega Enterprises Consulting (USA), Andrei Vladimirescu, UCB (USA); ISEP (FR) and all the Extended MOS-AK TPC Committee, we have pleasure to invite to the MOS-AK Compact Modeling Workshop which will be organized for consecutive 10th time in the timeframe of coming IEDM and CMC Meetings.
Planned,10th MOS-AK workshop organized in the Silicon Valley, aims to strengthen a network and discussion forum among experts in the field, enhance open platform for information exchange related to compact/SPICE modeling and Verilog-A standardization, bring people in the compact modeling field together, as well as obtain feedback from technology developers, circuit designers, and CAD/EDA tool developers and vendors.
Important Dates:
Topics to be covered include the following among other related to the compact/SPICE modeling :
Online Workshop Registration
Postworkshop Publications:
Extended MOS-AK Committee
Planned,10th MOS-AK workshop organized in the Silicon Valley, aims to strengthen a network and discussion forum among experts in the field, enhance open platform for information exchange related to compact/SPICE modeling and Verilog-A standardization, bring people in the compact modeling field together, as well as obtain feedback from technology developers, circuit designers, and CAD/EDA tool developers and vendors.
Important Dates:
- Call for Papers - Sept. 2017
- 2nd Announcement - Oct. 2017
- Final Workshop Program - Nov. 2017
- MOS-AK Workshop - Dec.6, 2017
Cadence Design Systems2655 Seely AveSan Jose, CA 95134
Topics to be covered include the following among other related to the compact/SPICE modeling :
- Compact Modeling (CM) of the electron devices
- Advances in semiconductor technologies and processing
- Verilog-A language for CM standardization
- New CM techniques and extraction software
- Open Source TCAD/EDA modeling and simulation
- CM of passive, active, sensors and actuators
- Emerging Devices, TFT, CMOS and SOI-based memory cells
- Microwave, RF device modeling, high voltage device modeling
- Nanoscale CMOS devices and circuits
- Technology R&D, DFY, DFT and reliability/ageing IC Designs
- Foundry/Fabless Interface Strategies
(any related inquiries can be sent to papers@mos-ak.org)
Online Workshop Registration
(any related inquiries can be sent to register@mos-ak.org)
Postworkshop Publications:
Selected best MOS-AK technical presentation will be recommended for further publication
in a special issue of the International Journal of High Speed Electronics and Systems
in a special issue of the International Journal of High Speed Electronics and Systems
Extended MOS-AK Committee
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