Apr 15, 2014

[mos-ak] [on-line publications] Spring MOS-AK Workshop in London

  
Recent, Spring MOS-AK Workshop at the London Metropolitan University was organized to discuss SPICE/compact modeling and its standardization with following Qucs GPL circuit simulation tutorial. The workshop's presentations are available on-line at <http://www.mos-ak.org/london_2014/>.
   
Please also distribute further information about next MOS-AK related events among all who are interested in the SPICE/compact modeling and its Verilog-A standardization:
Already now, I am looking forward to meet you at one of our MOS-AK modeling events, soon.

-- with regards - wladek for the Extended MOS-AK/GSA Committee;
--
Arbeitskreis Modellierung von Systemen und Parameterextraktion 
Modeling of Systems and Parameter Extraction Working Group
--
Over two decades of Enabling Compact Modeling R&D Exchange
--
-- 
--
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i-MOS version 201404 release

The i-MOS Team has announced  new release of the interactive Modeling and On-line Simulation
Platform (i-MOS), version 201404. In this release, there are several new services listed as follows:

  • Integrating the model benchmark testing suites in Model page
  • Including first three benchmark tests for model evaluations
  • Constructing the Developer page for device model submissions
  • Implementing one industry standard MOSFET model HiSIM2
  • Uploading presentation files from IWCM 2014 for your references

For more details, please visit the i-MOS website.

Apr 3, 2014

ESSDERC/ESSCIRC 2014 - Paper submission deadline extension

the Organizing Committee decided to extend the paper submission deadline of the 44th ESSDERC and 40th ESSCIRC to:
April 16th, 2014 23:59 (GMT - 07:00 am)

This is a hard deadline and no further extensions will be granted. After the deadline is elapsed, further paper submissions will not be accepted. The notification of paper acceptance, May 27, 2014, has not changed. Detailed information about the conferences is provided at the ESSCIRC/ESSDERC 2014 website.

[read more...]

VI Regional Seminar MNE & MS 2014

VI Regional Seminar on Computer Modeling and Designing in Micro- and Nanoelectronics and in Microelectromechanical Systems (MNE & MS 2014),
Orel, Russia, March 28 2014
  1. С.И. Матюхин1, Welcome and Seminar Openning,
    1Госуниверситет-УНПК
  2. Турин В.О.1, Кильчицкая М.В.2, Герасимов К.А.2Simulation of power bipolar transistor,
    1Госуниверситет-УНПК, 2БГТУ, г. Брянск
  3. Ващенко В.А., The physical ESD design for integrated circuits and electronic devices,
    Maxim Integrated Corp., г. Сан Хосе, Калифорния, США
  4. Цырлов А.М., Development of CMOS optocoupler,
    ОАО «Протон», г. Орёл
  5. Студенников А.С., Development of CMOS ICs,
    ОАО «Протон», г. Орёл
  6. Малый Д.О.1, Матюхин С.И.2, Ставцев А.В.1"Proton-Elektroteks" IGBT-devices JSC: basic approaches of production and quality assurance,
    1ЗАО «Протон-Электротекс», г. Орёл, 2Госуниверситет-УНПК
  7. Макулевский Г.Р., Матюхин С.И., Current-voltage characteristics of laser diodes based on AlGaAs,
    Госуниверситет-УНПК
  8. Матюхин С.И., Гришин В.О., Radiation effects of on the current-voltage characteristic of power diodes and thyristors,
    Госуниверситет-УНПК
  9. Писарев А.А.1, Матюхин С.И.2, Сурма А.М.1, Черников А.А.1Electrical characteristics of fast diodes with soft recovery,
    1ЗАО «Протон-Электротекс», г. Орёл, 2Госуниверситет-УНПК
  10. Koziol Z., Aestimo quantum mechanical software for modeling quantum wells in nanoelectronics,
    TU Rzeszow, Polska

Mar 25, 2014

Possible VTH Variation Sources

with 16 nm FinFET devices, the nature of the VTH variation changes.  On planar CMOS, random dopant fluctuations (RDFs) had the biggest influence. 
Possible VTH Variations
Ideal FinFETs have no doping, and therefore no RDFs.  However, this only works for low voltage operation.  We also need high-speed devices, which requires multiple threshold voltages (Vth's).  For FinFETs, this requires doping leading to RDF variation.  



Mar 20, 2014

New IJNM Paper

 
Open-source circuit simulation tools for RF compact semiconductor device modelling (Invited Paper)
 
Wladek Grabinski (Editor), Mike Brinson, Paolo Nenzi, Francesco Lannutti, Nikolaos Makris, Angelos Antonopoulos and Matthias Bucher
 
Keywords:
CAD; GNU; Qucs; QucsStudio; ngspice; compact modelling; EKV3; RF; MOSFET; Verilog-A
 
Article first published online: 18 MAR 2014 DOI: 10.1002/jnm.1973