Sep 30, 2010

Shipments of silicon for semiconductor manufacturing raise more than 23%

I copy part of a post from EDN:

Shipments of silicon for semiconductor manufacturing in 2010 will grow by 23.6% year-over-year, reaching 8.9 billion total square inches, according to iSuppli estimates.

Global silicon shipments in terms of square inches are bouncing back in 2010, after suffering like most segments did in the 2008/2009 economy.

That's according to a report from iSuppli Corp, which estimated shipments will rise to record levels in 2010.

Shipments of silicon for semiconductor manufacturing in 2010 will grow by 23.6% year-over-year, reaching 8.9 billion total square inches, up from 7.2 billion square inches in 2009, iSuppli forecast. Growth is expected to continue and iSuppli projected that by 2014 12.4 billion total square inches of silicon will be shipped.

read more here....

Sep 25, 2010

Nano antenna concentrates light


Condensed matter physicist Doug Natelson and graduate student Dan Ward have found a way to make an optical antenna from two gold tips separated by a nanoscale gap that gathers light from a laser. The tips "grab the light and concentrate it down into a tiny space," Natelson said, leading to a thousand-fold increase in light intensity in the gap. [more]

Sep 22, 2010

The pocket beamer is a reality!


Maher Kayal, professor at EPFL's Institute of Electrical Engineering presents the beamer of the future: 1 cm3 of technology that can be integrated into a portable computer or mobile telephone. Nicolas Abélé, technical director of Lemoptix, explains the future developments of this new device.

TSMC, Taiwan universities partner to cultivate semiconductor talent

TSMC, Taiwan universities partner to cultivate semiconductor talent: "TaiwanSemiconductor Manufacturing Co (TSMC), Taiwan's National Cheng ..."

Sep 21, 2010

Arana Behavioral Modeling Platform (as of Sept. 2010)

I copy part of the press release (by the way, the link in their home page doesn't work...):

Arana platform automates the process of behavioral model creation, generation, optimization, and validation for analog, custom digital, memory and mixed-signal integrated circuits. It features Arana Top-Down Designer, Arana Bottom-Up Designer, Arana Model Optimizer, and Arana Model Validator.

Arana Top-Down Designer supports behavioral model creation from specification or from templates, as well as automated calibration of model parameters against the transistor response and/or measurement data. Arana Bottom-Up Designer allows a circuit designer to automatically generate silicon-faithful parametric behavioral models—accounting for process, voltage, temperature, and loading variations—for functional verification.

Both Arana Bottom-Up Designer and Top-Down Designer support hierarchical modeling and automated generation of formal analog assertions and model test benches. Arana Model Optimizer and Model Validator optimize and validate behavioral models against transistor level responses and characterization and/or measurement data.

 read more...